Oscillator circuits have been known in the art for quite some time. Common applications include providing clock signals for integrated circuits, multiplexed displays, and counters. More complex applications range from digital signal processing to providing signals for the sample rates of A/D converters. The periodic signals provided by oscillator circuits have become as critical as power supplies used to power electronics.
Essentially, an oscillator circuit produces an output signal at a particular level having a certain period. Common configurations of oscillator circuits include state variable oscillators, Wien bridge oscillators, and Colpitts oscillators. FIG. 1 is a simplified illustration of a crystal oscillator circuit commonly known in the art. The crystal oscillator includes a vibrating element or crystal Y1 generally made of quartz, glass, silicon dioxide, etc. that is cut and polished to vibrate at a certain frequency (i.e., 32,768 MHZ, 100 MHZ, etc.). The crystal is a two terminal device consisting of the slice of quartz positioned between two conducting plates. The quartz crystal has a piezoelectric property that undergoes mechanical deformation in response to an electric field produced across the plates. From a terminal point of view, the crystal behaves as if it were a tuned RLC circuit. Crystals designed for oscillator circuits have very good stability with Q values greater than 10,000.
The circuit in FIG. 1 includes an inverting amplifier A1 with a feedback resistor R1 for providing gain to the amplifier A1. Input capacitor C1 and output capacitor C2 are typically balanced for maintaining a voltage of V/2. With a potential across the terminals of Y1, and amplifier A1 biased to become oscillatory, a small input level to amplifier A1 produces an oscillating output signal. Amplifier A1 is configured to be a high gain amplifier that operates at a resonant frequency determined by crystal Y1. The crystal oscillator circuit provides sustained oscillations having good stability characteristics for oscillatory control as well as for providing signals for high-performance processors.
Notwithstanding, oscillator circuits utilizing vibrating elements such as quartz have design limitations. One limitation is providing sufficient start-up voltage for amplifier A1 to begin oscillations. With capacitors C1 and C2 having an evenly distributed voltage between the input and output terminals, a start-up voltage, usually in the form of noise, must be provided to begin oscillations. Varying battery life of electronic devices using low-voltage oscillation circuits put a constraint on providing enough start-up voltage to begin oscillations.
A further limitation of crystal oscillator circuits is the interaction of the vibrating crystal with the oscillating amplifier. Within crystal oscillator circuits, and in particular for low voltage oscillator circuits, the interaction between the crystal and the amplifier can lead to a residual periodic shifting, or jitter of the output signal which is very undesirable at higher frequencies.
There are additional design considerations when developing microelectronic oscillator circuits having high gain amplifiers. One fatalistic deficiency of using high gain feedback amplifiers in microelectronics is caused by leakage currents inherent to Field Effect Transistors (FETs). FIG. 2A is a simplified illustration of how leakage occurs in a FET. FET 200 includes a p-type substrate 201 having gate oxide 202 and gate 203 typically made of metal or doped polysilicon. The p-type substrate is doped having n+ source 204 and drain 205 areas. In this illustration, leakage occurs in two ways. The first leakage, I.sub.subthreshold occurs between the source and drain of the FET. In smaller geometry FETs, the potential barrier of the device is controlled by both the gate-to-source voltage V.sub.GS and the drain-to-source voltage V.sub.DS. If the drain voltage is increased, the potential barrier in the channel decreases, leading to drain-induced barrier lowering. This reduction in the potential barrier eventually allows electron flow between the source and drain, even if the gate to source voltage is less than the threshold voltage V.sub.T. The undesirable channel current that flows under this condition is a leakage current called subthreshold current, I.sub.subthreshold.
The second type of current leakage resident in FETs occurs due the reverse bias condition of the source/drain to p-type substrate junctions. The reverse conduction, I.sub.reverser, of each junction occurs mainly due to the reverse saturation current and the generation current which originate in the depletion regions of the source/drain p-type substrate junctions. This current is a function of the bias voltage present at the terminals V.sub.D and V.sub.S with respect to the p-type substrate.
Total leakage, therefore, is the combination of the leakage caused due to each of these elements as illustrated in FIG. 2B, which is the equivalent circuit of FIG. 2A. EQU I.sub.leakage =I.sub.subthreshold +I.sub.reverse
When leakage current associated with a FET is present, it places a constraint on the applicability of FETs within oscillator circuits. A common device used in microelectronic circuits is an ESD protection circuit for eliminating static discharge effects on FETs. Typically, ESD protection circuits are designed using FETs having minimal channel lengths (L) with a large widths (W). The ESD protection circuit is used to clamp the input signal level to a certain voltage in order to minimize the impact of the ESD. However, as the channel lengths FETs used within ESD protection circuits are reduced, larger values of I.sub.subthreshold leakage occurs within the circuit. In an oscillator circuit using an ESD protection circuit and a high gain amplifier, I.sub.leakage as little as 7 nA will render the oscillator useless.
Therefore, the present invention overcomes the design challenges presented by the above deficiencies and, more particularly, reduces the intrinsic effects associated with developing microelectronic devices having oscillator circuits.